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ISL97671A
SMBus/I 2 C Communications
The ISL97671A can be controlled by SMBus/I 2 C for PWM or DC
dimming. Except when both the SDA and SCL input pins are tied to
ground, the LEDs are off by default and the user must use the
SMBus/I 2 C interface to turn them on. When both SDA and SCL are
instead shorted to ground, the LEDs turn on by default when the IC is
turned on, and the customer can use the ISL97671A without having
to control the SMBus/I 2 C interface. The switching frequency is fixed
at 600kHz if SMBus/I 2 C is not used.
Write Byte
The Write Byte protocol is only three bytes long. The first byte starts
with the slave address followed by the “command code,” which
translates to the “register index” being written. The third byte
contains the data byte that must be written into the register selected
by the “command code”. A shaded label is used on cycles during
which the slaved backlight controller “owns” or “drives” the Data
line. All other cycles are driven by the “host master.”
Read Byte
Slave Device Address
The slave address contains 7 MSB plus one LSB as R/W bit, but
these 8 bits are usually called Slave Address bytes. Figure 28 shows
that the high nibble of the Slave Address byte is 0x5 or 0101b to
denote the “backlight controller class.” Bit 3 in the lower nibble of
the Slave Address byte is 1. Bit 0 is always the R/W bit, as specified
by the SMBus/I 2 C protocol. Note: In this document, the device
address will always be expressed as a full 8-bit address instead of
the shorter 7-bit address typically used in other backlight controller
specifications to avoid confusion. Therefore, if the device is in the
write mode where bit 0 is 0, the slave address byte is 0x58 or
01011000b. If the device is in the read mode where bit 0 is 1, the
slave address byte is 0x59 or 01011001b.
SMBus/I 2 C Register Definitions
The backlight controller registers are Byte wide and accessible via the
SMBus/I 2 C Read/Write Byte protocols. Their bit assignments are
provided in the following sections with reserved bits containing a
default value of “0”.
Figure 27 shows that the four byte long Read Byte protocol starts
out with the slave address followed by the “command code” which
MSB
LSB
translates to the “register index.” Subsequently, the bus direction
turns around with the re-broadcast of the slave address with bit 0
0
1
0
1
1
0
0
R/W
indicating a read (“R”) cycle. The fourth byte contains the data
being returned by the backlight controller. That byte value in the
data byte reflects the value of the register being queried at the
“command code” index. Note the bus directions, which are
DEVICE
IDENTIFIER
DEVICE
ADDRESS
highlighted by the shaded label that is used on cycles during which
the slaved backlight controller “owns” or “drives” the Data line. All
other cycles are driven by the “host master.”
FIGURE 28. SLAVE ADDRESS BYTE DEFINITION
18
FN7709.3
November 30, 2012
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